Pricore Announces MaaC (Model as a Chip) Architecture
The company officially launches the MaaC architecture, embedding large model computation directly into circuits to break through traditional memory wall bottlenecks.
Edge AI Inference Silicon
Model as a Chip
The Model is The Chip · MaaC
Dedicated on-device AI inference chip that hardwires large model computations into the circuitry through architecture-level specialization, breaking through traditional memory wall bottlenecks to deliver exceptional inference speed and energy efficiency.
Today, large models are still software.
Large models run as software on general-purpose hardware, with weights shuttled repeatedly between storage and compute units, bottlenecked by the memory wall. Edge intelligence requires a fundamental architectural redesign—we believe:
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Large models should not be simulated by general-purpose computers.
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Model as a Chip
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Smartly hardened on native hardware
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Optimal, hardwired, silicon-based
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Human language is its software.
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Pricore designs edge AI inference chips.
Let the data speak
Core Performance of MaaC Architecture in Edge Inference Scenarios
0Tokens/s
High-speed reasoning
On-device large model generation speed for real-time interactive experiences
0x
Energy Efficiency Ratio
Energy efficiency improvement factor over general-purpose computing solutions
1/400
Inference Cost
Drastically reduced single-token inference costs accelerate on-device adoption.
No DRAM
No external DRAM required
On-chip weight storage simplifies hardware design and improves supply stability.
Note: The above benchmarks are compared against the NVIDIA RTX 5090. Data is from internal testing; actual performance may vary by model and scenario.
Products & Technology
Cross-Model and IC Chip Team
Praxin is dedicated to developing edge AI chips based on the "Model as a Chip" (MaaC) architecture. By architecturally optimizing designs, Praxin directly hardwires large model computations into circuits, breaking through traditional memory wall bottlenecks to deliver exceptional inference speed and energy efficiency at the edge.
The company employs multi-model and multi-IC optimization techniques, leveraging automated workflows to accelerate Model-to-Chip deployment and enable new possibilities for intelligent edge computing.
News & Updates
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The first-generation chip dedicated to edge-side inference has entered tape-out.
The first-generation chip has completed front-end design and physical implementation, entered tape-out, and the sample delivery plan has been launched.
Model-to-Chip automated design flow completes full-link validation
Automating the flow from model input to GDS layout output significantly shortens the time-to-chip cycle.
PuRicore at the Edge AI Industry Summit
The company delivered a keynote speech at the Edge AI Industry Summit, sharing technical pathways and industry insights on the MaaC architecture.
Bring intelligence to every edge device with Precise Core.
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